The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Aug. 29, 2016
Applicant:

Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;

Inventors:

Chi-Tsung Chiu, Kaohsiung, TW;

Meng-Jen Wang, Kaoshiung, TW;

Cheng-Hsi Chuang, Kaoshiung, TW;

Hui-Ying Hsieh, Kaohsiung, TW;

Hui Hua Lee, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 23/29 (2006.01); H01L 23/14 (2006.01); H01L 21/786 (2006.01); H01L 23/498 (2006.01); H01L 23/13 (2006.01); H01L 23/492 (2006.01); H01L 23/538 (2006.01); H01L 23/495 (2006.01); H01L 25/07 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3121 (2013.01); H01L 21/78 (2013.01); H01L 21/786 (2013.01); H01L 23/13 (2013.01); H01L 23/14 (2013.01); H01L 23/142 (2013.01); H01L 23/29 (2013.01); H01L 23/3142 (2013.01); H01L 23/492 (2013.01); H01L 23/49548 (2013.01); H01L 23/49575 (2013.01); H01L 23/49582 (2013.01); H01L 23/49586 (2013.01); H01L 23/49861 (2013.01); H01L 23/5389 (2013.01); H01L 23/562 (2013.01); H01L 24/19 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/97 (2013.01); H01L 21/561 (2013.01); H01L 23/315 (2013.01); H01L 23/3107 (2013.01); H01L 23/49541 (2013.01); H01L 25/074 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/24247 (2013.01); H01L 2224/2518 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/32257 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/97 (2013.01); H01L 2924/15153 (2013.01);
Abstract

A semiconductor device package includes a conductive base, and a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth. A semiconductor die is disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface. The second surface of the semiconductor die is bonded to the bottom surface of the cavity. A distance between the first surface of the semiconductor die and the first surface of the conductive base is about 20% of the depth of the cavity.


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