The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2018
Filed:
Oct. 03, 2017
Applicant:
Industrial Technology Research Institute, Hsin-Chu, TW;
Inventors:
Po-Chun Yeh, Taichung, TW;
Kan-Hsueh Tsai, Changhua County, TW;
Chuan-Wei Tsou, Hsinshu, TW;
Heng-Yuan Lee, Hsinchu County, TW;
Hsueh-Hsing Liu, Taipei, TW;
Han-Chieh Ho, Hsinchu County, TW;
Yi-Keng Fu, Hsinchu County, TW;
Assignee:
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/267 (2006.01); H01L 29/16 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02035 (2013.01); H01L 21/0243 (2013.01); H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 29/0657 (2013.01); H01L 29/267 (2013.01); H01L 21/02458 (2013.01); H01L 21/02502 (2013.01); H01L 29/16 (2013.01); H01L 29/2003 (2013.01);
Abstract
This disclosure provides an epitaxial wafer, which includes: a silicon wafer having a central area and an extremity area enclosing the central area, the extremity area having a stepped profile; and an nitride epitaxial layer formed on the silicon wafer; wherein, the stepped profile has a width between 10 and 1500 μm and a height between 1 and 500 μm.