The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2018

Filed:

May. 31, 2017
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Wanbing Yi, Singapore, SG;

Curtis Chun-I Hsieh, Singapore, SG;

Mahesh Bhatkar, Singapore, SG;

Hui Liu, Singapore, SG;

Chin Chuan Neo, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 27/22 (2006.01); H01L 43/08 (2006.01); H01L 43/02 (2006.01); H01L 43/12 (2006.01);
U.S. Cl.
CPC ...
H01L 27/222 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/12 (2013.01);
Abstract

Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, a method for producing an integrated circuit includes forming a memory cell with a memory cell upper surface. A capping layer is formed overlying the memory cell, and a portion of the capping layer is removed to expose the memory cell upper surface. A memory cell etch stop is formed overlying the memory cell upper surface after the portion of the capping layer is removed to expose the memory cell upper surface. The memory cell etch stop is removed from overlying the memory cell upper surface, and an interconnect is formed in electrical communication with the memory cell.


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