The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2018
Filed:
Jan. 12, 2016
Globalfoundries Inc., Grand Cayman, KY;
Chang Ho Maeng, Cohoes, NY (US);
Andy Wei, Dresden, DE;
Anthony Ozzello, Austin, TX (US);
Bharat Krishnan, Clifton Park, NY (US);
Guillaume Bouche, Albany, NY (US);
Haifeng Sheng, Rexford, NY (US);
Haigou Huang, Rexford, NY (US);
Huang Liu, Mechanicville, NY (US);
Huy M. Cao, Rexford, NY (US);
Ja-Hyung Han, Clifton Park, NY (US);
SangWoo Lim, Ballston Spa, NY (US);
Kenneth A. Bates, Happy Valley, OR (US);
Shyam Pal, Clifton Park, NY (US);
Xintuo Dai, Rexford, NY (US);
Jinping Liu, Ballston Lake, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
Methods of MOL S/D contact patterning of RMG devices without gouging of the Rx area or replacement of the dielectric are provided. Embodiments include forming a SOG layer around a RMG structure, the RMG structure having a contact etch stop layer and a gate cap layer; forming a lithography stack over the SOG and gate cap layers; patterning first and second TS openings through the lithography stack down to the SOG layer; removing a portion of the SOG layer through the first and second TS openings, the removing selective to the contact etch stop layer; converting the SOG layer to a SiOlayer; forming a metal layer over the SiOlayer; and planarizing the metal and SiOlayers down to the gate cap layer.