The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2018
Filed:
Feb. 02, 2017
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Li-Ping Huang, Miaoli County, TW;
Chun-Hsien Huang, Tainan, TW;
Yu-Tse Kuo, Tainan, TW;
Ching-Cheng Lung, Tainan, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 27/092 (2006.01); G11C 11/412 (2006.01); G11C 7/14 (2006.01); G11C 11/419 (2006.01); H01L 27/02 (2006.01); G11C 7/22 (2006.01); H01L 27/105 (2006.01); G11C 7/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); G11C 7/02 (2013.01); G11C 7/14 (2013.01); G11C 7/22 (2013.01); G11C 11/412 (2013.01); G11C 11/419 (2013.01); H01L 27/02 (2013.01); H01L 27/092 (2013.01); H01L 27/105 (2013.01); H01L 27/1116 (2013.01);
Abstract
The present invention proposes a static random-access memory device (SRAM). The static random-access memory device is composed of two P-channel gates of loading transistor, two N-channel gates of driving transistor and two N-channel gates of accessing transistor in a memory cell. A dummy gate is disposed adjacent to the N-channel gate of accessing transistor with a bit line node disposed therebetween, wherein the dummy gate is electrically connected to a ground voltage through a metal layer.