The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2018

Filed:

Apr. 01, 2016
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Sin-Yao Huang, Tainan, TW;

Ching-Chun Wang, Tainan, TW;

Dun-Nian Yaung, Taipei, TW;

Feng-Chi Hung, Chu-Bei, TW;

Ming-Tsong Wang, Taipei, TW;

Shih Pei Chou, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1464 (2013.01); H01L 27/1469 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14643 (2013.01);
Abstract

Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3DIC includes a first substrate including a photodetector which is configured to receive light in a first direction from a light source. An interconnect structure is disposed over the first substrate, and includes a plurality of metal layers and insulating layers that are over stacked over one another in alternating fashion. One of the plurality of metal layers is closest to the light source and another of the plurality of metal layers is furthest from the light source. A bond pad recess extends into the interconnect structure from an opening in a surface of the 3DIC which is nearest the light source and terminates at a bond pad. The bond pad is spaced apart from the surface of the 3DIC and is in direct contact with the one of the plurality of metal layers that is furthest from the light source.


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