The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 31, 2018
Filed:
Sep. 08, 2016
Applicant:
Freescale Semiconductor, Inc., Austin, TX (US);
Inventors:
David Clegg, Austin, TX (US);
James S. Golab, Austin, TX (US);
Trent Uehling, Austin, TX (US);
Tingdong Zhou, Austin, TX (US);
Assignee:
NXP USA, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0655 (2013.01); H01L 21/563 (2013.01); H01L 21/6835 (2013.01); H01L 23/3128 (2013.01); H01L 24/03 (2013.01); H01L 24/09 (2013.01); H01L 24/11 (2013.01); H01L 24/17 (2013.01); H01L 24/43 (2013.01); H01L 24/49 (2013.01); H01L 24/73 (2013.01); H01L 24/85 (2013.01); H01L 2221/68354 (2013.01); H01L 2224/04042 (2013.01);
Abstract
Embodiments of a semiconductor packaged device and method of making thereof are provided, the device including a substrate; a first flip chip die mounted to a first major surface of the substrate; a second flip chip die mounted to the first major surface of the substrate, the second flip chip die laterally adjacent to the first flip chip die on the first major surface; and a wire bond formed between a first bond pad on the first flip chip die and a second bond pad on the second flip chip die.