Ann Arbor, MI, United States of America

Zaher Andraus

This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignee: University of Michigan. Active years: 2013-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Zaher Andraus. Retrieved from https://idiyas.com/inventor/zaher-andraus-fuct6dvk

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2013-2015

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Zaher Andraus: Innovator in Hardware Design Verification

Introduction

Zaher Andraus is a notable inventor based in Ann Arbor, MI (US). He has made significant contributions to the field of hardware design verification, holding 2 patents that showcase his innovative approach to electronic circuit design.

Latest Patents

One of Zaher Andraus's latest patents is titled "Automated scalable verification for hardware designs at the register transfer level." This patent describes a system and methods for verifying a hardware design for an electronic circuit. The method includes providing a hardware design description, extracting a set of design constraints, creating an abstraction model, and property checking the abstraction model in relation to design properties. When a violation in the electronic circuit is detected, the feasibility of the violation is checked, and if deemed infeasible, the abstraction model is refined. This innovative approach enhances the reliability and efficiency of hardware design verification.

Career Highlights

Zaher Andraus is affiliated with the University of Michigan, where he continues to advance research in hardware design and verification. His work has been instrumental in developing methodologies that improve the accuracy and scalability of electronic circuit verification processes.

Collaborations

Zaher has collaborated with esteemed colleagues such as Karem A Sakallah and Mark Liffiton. These collaborations have further enriched his research and contributed to the advancement of the field.

Conclusion

Zaher Andraus is a prominent figure in the realm of hardware design verification, with a focus on innovative methodologies that enhance electronic circuit reliability. His contributions through patents and collaborations continue to shape the future of hardware design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…