Yung-Cheng Chen

Title: Yung-Cheng Chen: Innovator in I/O Functional Testing

Introduction

Yung-Cheng Chen is a notable inventor based in San Jose, CA. He has made significant contributions to the field of integrated circuit testing, particularly through his innovative methods for assessing I/O functionality.

Latest Patents

Yung-Cheng Chen holds a patent titled "Method for gross I/O functional test at wafer sort." This patent describes a method and test configuration for performing a gross I/O functionality test at wafer sort. The method utilizes a current injector, such as a pullup or a pulldown on an I/O pad, to inject current at the I/O pad. Based on the resulting voltage, it determines if the I/O characteristics of the integrated circuit meet the performance criteria set by the manufacturer. The test configuration can include an output buffer, which may be a tristate buffer, and/or an input buffer for verifying the performance of those components. This innovative method allows tests to be conducted at wafer sort without requiring a precision measurement unit or direct access to the I/O pad being tested. Yung-Cheng Chen has 1 patent to his name.

Career Highlights

Yung-Cheng Chen is currently employed at Xilinx, Inc., where he continues to develop and refine testing methodologies for integrated circuits. His work has been instrumental in enhancing the efficiency and accuracy of I/O testing processes.

Collaborations

Yung-Cheng has collaborated with notable colleagues, including Randy J Simmons and David Mark, contributing to advancements in their field through teamwork and shared expertise.

Conclusion

Yung-Cheng Chen's innovative approach to I/O functional testing has made a significant impact in the realm of integrated circuits. His contributions continue to influence the industry and improve testing methodologies.