Gwangmyeong, South Korea

Yun Woo Shin

This inventor holds 1 USPTO granted patent and 4 published patent applications and 1 EPO patent. Top assignee: Korea University Research and Business Foundation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yun Woo Shin. Retrieved from https://idiyas.com/inventor/yun-woo-shin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

 

Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations of Yun Woo Shin

Introduction

Yun Woo Shin is a notable inventor based in Gwangmyeong, South Korea. He has made significant contributions to the field of memory technology through his innovative patent. His work focuses on enhancing the efficiency and functionality of logic memory systems.

Latest Patents

Yun Woo Shin holds a patent for a "Universal logic memory block using universal logic memory cells." This invention relates to a universal logic memory block that utilizes multiple universal logic memory cells. The design allows for the implementation of various combinational logical operations within a single structure. This is achieved by combining logical operation results from several universal logic memory cells, which are driven by a positive feedback loop using triple-gate silicon devices. He has 1 patent to his name.

Career Highlights

Yun Woo Shin is affiliated with the Korea University Research and Business Foundation, where he continues to advance his research and development efforts. His work is instrumental in pushing the boundaries of memory technology and its applications.

Collaborations

Some of his notable coworkers include Jong Seong Han and Kyoung Ah Cho, who contribute to his research endeavors and collaborative projects.

Conclusion

Yun Woo Shin's innovative work in memory technology exemplifies the potential for advancements in this field. His contributions are paving the way for future developments in logic memory systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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