Yokohama, Japan

Yuichi Osano

This inventor holds 1 USPTO granted patent. Top assignee: Kikusui Electronics Corporation. Active years: 1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yuichi Osano. Retrieved from https://idiyas.com/inventor/yuichi-osano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 1998

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1 patent (USPTO):Explore Patents

Title: Yuichi Osano: Innovator in Memory Capacity Testing

Introduction

Yuichi Osano is a notable inventor based in Yokohama, Japan. He has made significant contributions to the field of computer systems, particularly in memory capacity testing. His innovative approach has led to the development of a unique method that enhances the efficiency of memory systems.

Latest Patents

Osano holds a patent for a "Memory capacity test method and computer system." This invention provides a method capable of confirming the memory capacity of an actually mounted memory in a short time. The method involves writing first data to a check address, which is an n-th power of two, and then writing second data to address 0. If the data read from the check address disagrees with the first data, it indicates that the memory is not mounted on the check address. This method is based on the principle that the check address points to address 0 when the memory is not mounted, allowing for efficient memory capacity verification.

Career Highlights

Yuichi Osano is currently associated with Kikusui Electronics Corporation, where he continues to innovate and contribute to advancements in technology. His work focuses on improving memory systems and enhancing their performance.

Collaborations

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Conclusion

Yuichi Osano's contributions to memory capacity testing represent a significant advancement in computer technology. His innovative methods are paving the way for more efficient memory systems in the future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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