Yue Han

Title: Innovations of Yue Han in Error Correcting Code Testing

Introduction

Yue Han is a notable inventor based in GuangZhou, China. He has made significant contributions to the field of semiconductor technology, particularly in the testing of error correcting codes. His innovative approach has led to the development of a unique patent that enhances the efficiency of testing functions in Field Programmable Gate Arrays (FPGAs).

Latest Patents

Yue Han holds a patent titled "Method and apparatus for testing error correcting code (ECC) function of FPGA on-chip block random access memory (BRAM)." This invention provides a system and method for testing the ECC function of FPGA on-chip BRAM. The design includes control modules, multiple BRAMs with ECC functions arranged in a ring, and parity bit comparison modules. The control module sends data read and write test instructions to each BRAM, which sequentially reads and writes test data while generating parity bits for comparison. This innovative method reduces the required test stimuli and enhances test efficiency.

Career Highlights

Yue Han is currently employed at Gowin Semiconductor Corporation, where he continues to work on advancements in semiconductor technology. His expertise in error correcting codes and FPGA technology has positioned him as a valuable asset to his team and the industry.

Collaborations

Yue has collaborated with colleagues such as Jingxiang Wang and Zheng Wang, contributing to various projects within the semiconductor field. Their combined efforts have led to advancements in testing methodologies and improved product reliability.

Conclusion

Yue Han's contributions to the field of semiconductor technology, particularly through his patent on ECC testing, demonstrate his innovative spirit and commitment to enhancing testing efficiency. His work at Gowin Semiconductor Corporation and collaborations with fellow inventors further solidify his impact in the industry.