This inventor holds 3 USPTO granted patents and 1 EPO patent. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2025-2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2025-2026
Title: Younggyu Lee and Memory Device Innovation
Introduction
Younggyu Lee is an inventor based in Suwon, South Korea. His patent work includes memory devices and systems, with a focus on duty-cycle correction and signal timing. He is associated with Samsung Electronics Co., Ltd. Lee is credited with 3 patents.
Latest Patents
One of Lee’s latest patent titles is “Memory Device, Memory System, and Operating Method of Memory Device.” The disclosed memory device uses duty-correction circuits to coordinate read and write operations. One circuit performs read duty-cycle correction and outputs a data-strobe signal, while another generates phase-shifted clock signals and corrects their duty cycles. The design allows read and write duty-cycle correction to occur simultaneously.
A related disclosure under the same title describes a memory device that performs read duty-cycle correction and outputs a data-strobe signal. A second circuit divides that signal and compares the original and divided signals to perform write duty-cycle correction. Together, these approaches address timing and signal integrity in memory systems.
Career Highlights
Lee’s listed patent portfolio centers on memory technology and circuit-level timing control. His work reflects efforts to improve how memory devices manage data-strobe and clock signals during operation.
Collaborations
Lee is associated with Samsung Electronics Co., Ltd., a company active in electronics and semiconductor technologies. The available information identifies this company affiliation but does not specify particular co-inventors or other collaborators for the described patents.
Conclusion
Younggyu Lee’s patent work highlights memory-device innovations that coordinate read and write duty-cycle correction, supporting precise signal timing in memory systems.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
