Gyeonggi-do, South Korea

Young-sub Jeong

This inventor holds 2 USPTO granted patents. Top assignee: Fairchild Korea Semiconductor Ltd.. Active years: 2008-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Young-sub Jeong. Retrieved from https://idiyas.com/inventor/young-sub-jeong

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 50.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 2008-2011

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2 patents (USPTO):Explore Patents

Title: Young-sub Jeong and Power Semiconductor Innovation.

Introduction

Young-sub Jeong is an inventor associated with Fairchild Korea Semiconductor Ltd. in Gyeonggi-do, South Korea. His listed patent work focuses on power semiconductor devices designed to suppress substrate recirculation current. He is credited with 2 patents.

Latest Patents

Jeong’s listed patents address a power semiconductor structure that separates a transistor region from a control-element region using an intervening isolation region. The designs combine a substrate and semiconductor region with highly doped buried and bottom layers, along with additional doped regions and isolation structures.

The patent descriptions explain that this arrangement can electrically separate parasitic bipolar junction transistors in the isolation regions from the control-element region. The inventions concern both the device structure and methods for fabricating it, with the aim of suppressing substrate recirculation current.

Career Highlights

Jeong’s patent record highlights work on semiconductor-device architecture and fabrication. His contributions focus on managing parasitic electrical effects through the placement of doped layers and isolation regions.

Collaborations

Jeong’s listed coworkers include Tae-hun Kwon and Cheol-joong Kim. Their names appear alongside his work on power semiconductor devices for suppressing substrate recirculation current.

Conclusion

Young-sub Jeong’s patent work reflects a focused contribution to power semiconductor design, particularly through structures intended to control parasitic currents and electrically isolate device regions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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