Kadoma, Japan

Yoshimasa Himura

This inventor holds 1 USPTO granted patent. Top assignee: Matsushita Electric Works, Ltd.. Active years: 1992.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yoshimasa Himura. Retrieved from https://idiyas.com/inventor/yoshimasa-himura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 24(Granted Patents)


Company Filing History:


Years Active: 1992

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1 patent (USPTO):Explore Patents

Title: The Innovations of Yoshimasa Himura

Introduction

Yoshimasa Himura is a notable inventor based in Kadoma, Japan. He has made significant contributions to the field of semiconductor technology. His work has led to advancements that enhance the integration of integrated circuit (IC) chips.

Latest Patents

Himura holds a patent for a semiconductor device. This device features a circuit pattern of a conductive thin film formed on a ceramic substrate through etching. An IC chip is connected to the etched circuit pattern via gang-bonding, allowing direct contact between the conduction parts of the circuit pattern and the IC chip. This innovative design enables a denser circuit pattern, contributing to higher integration of the IC chip. He has 1 patent to his name.

Career Highlights

Yoshimasa Himura has worked at Matsushita Electric Works, Ltd., where he has been involved in various projects related to semiconductor devices. His expertise in this area has positioned him as a key figure in the development of advanced electronic components.

Collaborations

Throughout his career, Himura has collaborated with talented individuals such as Tatsuhiko Irie and Mitsuhiro Kani. These partnerships have fostered innovation and contributed to the success of their projects.

Conclusion

Yoshimasa Himura's contributions to semiconductor technology exemplify the impact of innovative thinking in the electronics industry. His patent and collaborative efforts continue to influence advancements in integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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