Location History:
- Owariasahi, JP (1984)
- Aichi, JP (1989 - 1990)
Company Filing History:
Years Active: 1984-1990
Title: Innovations of Yoshiki Fujioka
Introduction
Yoshiki Fujioka is a notable inventor based in Aichi, Japan. He has made significant contributions to the field of microprocessor technology, holding a total of 3 patents. His work focuses on enhancing the performance and efficiency of instruction decoding methods.
Latest Patents
Fujioka's latest patents include an instruction decode method and arrangement suitable for a high-speed microprocessor. This innovative arrangement features a high-speed PLA decoder of small capacity for decoding instruction words with small execution cycles, alongside a low-speed PLA decoder of large capacity for decoding instruction words with larger execution cycles. The design allows for the activation of the low-speed PLA decoder when the high-speed decoder is not permitted to execute instruction decoding. This approach mitigates instantaneous current noises generated in the PLA decoders, preventing erroneous operations while maintaining high-speed microprocessor performance. Another significant patent involves an emulation method that allows programs to run on systems with different instruction word sets. This method minimizes overhead by translating input/output macro instructions from an emulated program into those compatible with the operating system.
Career Highlights
Yoshiki Fujioka is currently employed at Hitachi, Ltd., where he continues to innovate in the field of microprocessors. His work has been instrumental in advancing the capabilities of modern computing systems.
Collaborations
Fujioka has collaborated with notable colleagues, including Hitoshi Suzuki and Shigekatsu Takahashi, contributing to various projects that enhance microprocessor technology.
Conclusion
Yoshiki Fujioka's contributions to microprocessor technology through his innovative patents demonstrate his expertise and commitment to advancing the field. His work continues to influence the development of high-speed computing systems.