The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 1990

Filed:

Jun. 09, 1988
Applicant:
Inventors:

Yasuhiro Nakatsuka, Hitachi, JP;

Takashi Hotta, Hitachi, JP;

Tadaaki Bandoh, Ibaraki, JP;

Yoshiki Fujioka, Aichi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
364200 ; 364900 ; 3642599 ; 3642624 ; 3649428 ; 3649445 ; 3649462 ;
Abstract

An instruction decode method and arrangement suitable for a high-speed microprocessor are disclosed. The instruction decode arrangement comprises a high-speed PLA decoder of small capacity for decoding an instruction word having a small execution cycle, a low-speed PLA decoder of large capacity for decoding an instruction word having a large execution cycle, and a circuit for activating the low-speed PLA decoder to cause it to execute instruction decoding when the high-speed PLA decoder is not permitted for the execution of instruction decoding. Instantaneous current noises generated in the PLA decoders can be mitigated to avoid erroneous operations without degrading averaged decoding performance, thereby permitting the microprocessor to operate at high speeds.


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