Shenzhen, China

Yongguang Cheng

This inventor holds 1 USPTO granted patent. Top assignee: Huawei Technologies Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yongguang Cheng. Retrieved from https://idiyas.com/inventor/yongguang-cheng-da79rev0

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yongguang Cheng and Modular Computing Hardware.

Introduction

Yongguang Cheng is an inventor associated with Shenzhen, China, and Huawei Technologies Co., Ltd. His patent work includes a motherboard design that separates core computing functions from expandable input/output and management capabilities. The supplied information lists 1 patent for him.

Latest Patents

Cheng’s listed patent, “Motherboard and Computing Device,” describes a motherboard comprising a basic computing unit and an extension unit. The basic unit contains a core component and an external interface, while the extension unit expands the basic unit’s functions through a corresponding interface.

The design divides a conventional motherboard into a processor-focused basic unit and an extension unit for input/output and management. This arrangement is intended to reduce the effect of extension components on the basic computing unit and allow those components to be replaced flexibly according to practical needs.

Career Highlights

The available information connects Cheng’s patent activity with Huawei Technologies Co., Ltd. and identifies Shenzhen as his location. His listed invention focuses on a modular approach to motherboard architecture and computing-device design.

Collaborations

Yimin Yao is identified as Cheng’s coworker. The supplied information does not specify whether Yao collaborated on the patent.

Conclusion

Yongguang Cheng’s listed patent presents a modular motherboard architecture that separates core computing from expandable functions, supporting flexible hardware configurations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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