Yateesh S. Gowda is an inventor based in Solana Beach, California, whose patent work focuses on efficient packet processing in wireless communication systems. He is associated with Qualcomm Incorporated and holds 2 patents.

Latest Patents

Gowda’s listed patents address uplink packet construction and the handling of packets discarded by timers in wireless systems.

“Efficient UE QoS/UL Packet Build in LTE” describes a processing system that coordinates functions across two threads. One thread provides data to help the other construct an uplink packet, while the second thread returns data to support the first thread’s operations.

“Efficient Packet Handling for Timer-Based Discard in a Wireless Communication System” describes methods for reducing processing overhead when packets are discarded. The system tracks consecutive discarded packets and compares their number with a tolerated threshold. When the threshold is not exceeded, certain processing steps for subsequent packets may be omitted while preserving properties such as header-compression and ciphering synchronization.

Career Highlights

Gowda’s patent portfolio reflects work on improving the efficiency of wireless communication processing. His inventions address coordination between processing threads and reducing unnecessary operations when packet-discard events occur.

Collaborations

Gowda is associated with Qualcomm Incorporated. His listed coworkers include Shailesh Maheshwari and Vanitha Aravamudhan Kumar.

Conclusion

Yateesh S. Gowda’s patents focus on practical improvements to LTE uplink packet construction and efficient packet handling, contributing to the development of wireless communication systems.

Profile summary based on public USPTO records.