Cupertino, CA, United States of America

Xin-Yi Zhang

This inventor holds 1 USPTO granted patent. Top assignee: Marvell International Limited. Active years: 2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Xin-Yi Zhang. Retrieved from https://idiyas.com/inventor/xin-yi-zhang-aacv9m2c

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2006

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1 patent (USPTO):Explore Patents

Title: Xin-Yi Zhang and Electrostatic Discharge Protection

Introduction

Xin-Yi Zhang is an inventor associated with Marvell International Limited and based in Cupertino, California. His patent work includes a design for electrostatic discharge protection in integrated circuits.

Latest Patents

Zhang is credited with 1 patent: “Collector Structure for Electrostatic Discharge Protection Circuits.” The invention describes an electrostatic discharge (ESD) device designed to provide more uniform breakdown across finger regions in a semiconductor substrate. Its collector region includes a highly doped middle region positioned near layers with different doping characteristics. The design can reduce the device’s breakdown voltage, and it describes eliminating a lightly doped region in the collector area while forming an interlayer insulating layer in contact with the top-side regions and middle region.

Career Highlights

Zhang’s listed patent reflects work on semiconductor device design and integrated-circuit protection. The invention addresses how collector-region structure and substrate doping can affect ESD-device breakdown behavior.

Collaborations

Zhang is associated with Marvell International Limited. His listed coworker is Choy Hing Li.

Conclusion

Xin-Yi Zhang’s patent focuses on a collector structure intended to improve breakdown behavior in ESD protection circuits, highlighting his contribution to semiconductor and integrated-circuit technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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