Jiangsu, China

Xiang Qin

This inventor holds 1 USPTO granted patent and 3 published patent applications and 1 EPO patent. Top assignee: Csmc Technologies Fab2 Co., Ltd.. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Xiang Qin. Retrieved from https://idiyas.com/inventor/xiang-qin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

 

Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Xiang Qin - Innovator in Semiconductor Technology

Introduction

Xiang Qin is a notable inventor based in Jiangsu, China. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique semiconductor device and its manufacturing method.

Latest Patents

Xiang Qin holds 1 patent for a semiconductor device and manufacturing method. This patent describes a method that includes providing a substrate of a first conductivity type and forming doped regions of a second conductivity type within the substrate. The method addresses the challenges posed by high temperatures during the etching process, which can affect the high-energy ion implantation process.

Career Highlights

Xiang Qin is currently employed at Csmc Technologies Fab2 Co., Ltd. His work at this company has allowed him to focus on advancing semiconductor technologies. His expertise in this area has positioned him as a valuable contributor to the industry.

Collaborations

Xiang Qin collaborates with Ruibin Cao, enhancing the innovative efforts within their projects. Their partnership exemplifies the importance of teamwork in driving technological advancements.

Conclusion

Xiang Qin's contributions to semiconductor technology through his patent demonstrate his innovative spirit and dedication to the field. His work continues to influence the development of advanced semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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