Hsinchu, Taiwan

Wei-Lun Wan

This inventor holds 2 USPTO granted patents. Top assignee: Mediatek Singapore Pte. Ltd.. Active years: 2022-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wei-Lun Wan. Retrieved from https://idiyas.com/inventor/wei-lun-wan-qqb5vzk6

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2022-2024

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2 patents (USPTO):Explore Patents

Title: The Innovative Journey of Wei-Lun Wan

Introduction: Wei-Lun Wan, a talented inventor hailing from Hsin-Chu, Taiwan, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Wei-Lun Wan's latest patents focus on advancements in semiconductor technology, particularly in the development of cutting-edge microchips with enhanced processing capabilities.

Career Highlights: With a career spanning over two decades, Wei-Lun Wan has worked for several leading tech companies in Taiwan, honing his skills in research and development. His expertise lies in the areas of nanotechnology and materials science, leading to the creation of revolutionary products.

Collaborations: Throughout his career, Wei-Lun Wan has collaborated with top researchers and engineers in the industry, fostering a culture of innovation and excellence. His collaborative efforts have resulted in the successful development of patented technologies that have reshaped the semiconductor landscape.

Conclusion: Wei-Lun Wan's passion for innovation and his relentless pursuit of technological advancement have solidified his position as a respected figure in the world of inventors. His contributions continue to inspire future generations of inventors and pave the way for a more technologically advanced future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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