Wee Kwong Yeo

Title: Innovations by Inventor Wee Kwong Yeo

Introduction

Wee Kwong Yeo is a notable inventor based in Singapore, recognized for his contributions to the field of lithography and integrated circuit design. With a total of two patents to his name, he has made significant advancements that enhance the manufacturing processes of integrated circuits.

Latest Patents

Wee Kwong Yeo's latest patents include "Topography Driven OPC" and "Surface Topography Enhanced Pattern (STEP) Matching." The first patent focuses on enhancements in lithography for forming integrated circuits. It involves a topography analysis of design data files to obtain accumulative topography information for different mask levels. This information facilitates topography-driven optical proximity correction and lithography. The second patent presents a design or lithographic enhancement process, which includes a method for forming a device based on this enhancement process. It involves processing a design data file that contains information about design layers in an integrated circuit. The process enhances patterns in the design data file by considering the topography information of design layers corresponding to the masks of the integrated circuit.

Career Highlights

Wee Kwong Yeo is currently employed at Globalfoundries Singapore Pte. Ltd., where he applies his expertise in lithography and integrated circuit design. His work has contributed to the advancement of technologies that are crucial for the semiconductor industry.

Collaborations

Throughout his career, Wee Kwong Yeo has collaborated with talented individuals such as Valerio Perez and Ushasree Katakamsetty. These collaborations have fostered innovation and have led to the development of cutting-edge technologies in the field.

Conclusion

Wee Kwong Yeo's contributions to the field of lithography and integrated circuit design are significant. His innovative patents and collaborations highlight his role as a key figure in advancing semiconductor technology.