Kajang, Malaysia

Want Sent Khor

This inventor holds 2 USPTO granted patents. Top assignee: Altera Corporation. Active years: 2017-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Want Sent Khor. Retrieved from https://idiyas.com/inventor/want-sent-khor

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2017-2019

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2 patents (USPTO):Explore Patents

Title: Innovations of Want Sent Khor

Introduction

Want Sent Khor is a notable inventor based in Kajang, Malaysia. He has made significant contributions to the field of integrated circuits, holding a total of 2 patents. His work focuses on enhancing the performance of serial interface circuits through innovative designs.

Latest Patents

One of Want Sent Khor's latest patents is an integrated circuit with dynamically-adjustable buffer space for serial interface. This invention includes a method for dynamically adjusting a receive buffer in an integrated circuit. A fixed-size buffer circuit is utilized to buffer data received via a serial interface circuit. The performance of the serial interface circuit is monitored, allowing the receive buffer to be dynamically extended based on this performance. Other embodiments, aspects, and features are also disclosed in this patent.

Career Highlights

Want Sent Khor is currently employed at Altera Corporation, where he continues to innovate in the field of integrated circuits. His work has contributed to advancements in technology that enhance data processing and communication.

Collaborations

Some of his coworkers include Zun Yang Tan and Tat Mun Lui, who collaborate with him on various projects within the company.

Conclusion

Want Sent Khor's contributions to integrated circuit technology demonstrate his commitment to innovation and excellence in his field. His patents reflect a deep understanding of the complexities involved in serial interface performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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