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For the Inventor, By the Inventor

Sunnyvale, CA, United States of America

Viresh Ratnakar

This inventor holds 21 USPTO granted patents, plus 1 CIPO patent. Top assignees: Seiko Epson Corporation, Google Inc., Seiko Espoo Corporation. Active years: 2000-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Viresh Ratnakar. Retrieved from https://idiyas.com/inventor/viresh-ratnakar

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 21

% Patents Active = 85.7


Average Co-Inventor Count = 1.6

ph-index = 13

Forward Citations = 1,036(Granted Patents)


Location History:

  • Los Altos Hills, CA (US) (2012)
  • Sunnyvale, CA (US) (2000 - 2015)
  • Los Altos, CA (US) (2013 - 2016)

Company Filing History:

goldMedal14 out of 34,238 
 
Seiko Epson Corporation
 patents
silverMedal6 out of 33,920 
 
Google Inc.
 patents
bronzeMedal1 out of 1 
 
Seiko Espoo Corporation
 patent

Years Active: 2000-2016

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21 patents (USPTO):Explore Patents
1. 9280952 - Selective display of OCR'ed text and corresponding images from publications on a client device (2016-03-08),
2. 9031898 - Presentation of search results based on document structure (2015-05-12),
3. 8675012 - Selective display of OCR'ed text and corresponding images from publications on a client device (2014-03-18),
4. 8482581 - Selective display of OCR'ed text and corresponding images from publications on a client device (2013-07-09),
5. 8373724 - Selective display of OCR'ed text and corresponding images from publications on a client device (2013-02-12),
6. 8254681 - Display of document image optimized for reading (2012-08-28),
7. 7391910 - LAPE: layered presentation system utilizing compressed-domain image processing (2008-06-24),
8. 7050656 - Image scaling in the compressed domain (2006-05-23),
9. 7046818 - Standards compliant watermarking for access management (2006-05-16),
10. 6928186 - Semantic downscaling and cropping (SEDOC) of digital images (2005-08-09),
11. 6625309 - Image partitioning to avoid overlap transmission (2003-09-23),
12. 6574372 - Wavelet transform coding technique (2003-06-03),
13. 6556688 - Watermarking with random zero-mean patches for printer tracking (2003-04-29),
14. 6522766 - Watermarking with random zero-mean patches for copyright protection (2003-02-18),
15. 6421468 - Method and apparatus for sharpening an image by scaling elements of a frequency-domain representation (2002-07-16),

Title: The Innovative Journey of Viresh Ratnakar

Introduction: Viresh Ratnakar, a visionary inventor based in Sunnyvale, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Viresh Ratnakar holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies, showcasing his versatility and forward-thinking approach to invention.

Career Highlights: With a background in computer science and engineering, Viresh Ratnakar has a successful track record of developing cutting-edge solutions that have revolutionized industries. His ability to blend creativity with technical expertise has led to the creation of pioneering products that have garnered international acclaim.

Collaborations: Throughout his career, Viresh Ratnakar has collaborated with leading tech companies, research institutions, and universities to further his research and bring his inventions to life. His collaborative spirit and passion for innovation have been instrumental in his success.

Conclusion: Viresh Ratnakar's dedication to pushing the boundaries of technology and his relentless pursuit of innovation make him a true trailblazer in the world of inventors. His work continues to inspire future generations of inventors to think outside the box and create solutions that shape the world of tomorrow.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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