Portland, OR, United States of America

Vikram Suresh

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Block, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Vikram Suresh. Retrieved from https://idiyas.com/inventor/vikram-suresh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Vikram Suresh and Fault-Tolerant Hashing Control

Introduction

Vikram Suresh is an inventor based in Portland, Oregon, and works at Block, Inc. His patent work includes a system designed to keep hashing operations connected when a hashing chip becomes unresponsive.

Latest Patents

Suresh is associated with 1 patent, titled “Fault-tolerant hashing control architecture.” The patent describes a hashing system that distributes calculations across multiple hashing chips to produce at least one hash digest from a dataset. Connectors link the chips, including a backup connection that lets the first chip communicate directly with the third chip if the second chip is nonresponsive. This bypass helps the system maintain communication despite a chip failure.

Career Highlights

Suresh’s listed invention addresses fault tolerance in hashing hardware. Its architecture provides an alternate communication path, helping hashing operations continue when a component does not respond.

Collaborations

Suresh’s listed coworkers include Afshin Rezayee and Malcolm Smith. The available information does not specify their roles in the patent or their contributions to its development.

Conclusion

Vikram Suresh’s patent describes a practical approach to improving the resilience of hashing systems through a backup connection between chips.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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