Austin, TX, United States of America

Vaijayanthiamala K Anand

This inventor holds 1 USPTO granted patent. Top assignee: International Business Machines Corporation. Active years: 2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Vaijayanthiamala K Anand. Retrieved from https://idiyas.com/inventor/vaijayanthiamala-k-anand

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2008

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1 patent (USPTO):Explore Patents

Title: Vaijayanthiamala K Anand and a Patent on Memory Coherence

Introduction

Vaijayanthiamala K Anand is an inventor associated with Austin, Texas, and International Business Machines Corporation. His patent work addresses memory coherence in multiprocessor systems, where efficient coordination among processors can help reduce cache misses.

Latest Patents

The provided information lists 1 patent for Anand: “Memory coherence protocol enhancement using cache line access frequencies.” The invention tracks how frequently each cache line is accessed and uses that information to choose between invalidating a line and requesting updated data. When a processor frequently accesses a line modified by another processor, it can request an update; otherwise, the line is invalidated. Periodically resetting the access counts helps the system respond to recent usage patterns.

Career Highlights

Anand’s listed patent is assigned to International Business Machines Corporation. It describes a dynamic approach to memory coherence intended to maintain efficiency while minimizing cache misses.

Collaborations

The provided information names Sandra K Johnson and Kimberly DaShawn Simon as Anand’s coworkers. It does not specify their roles in the patent or the nature of their collaboration.

Conclusion

Vaijayanthiamala K Anand’s patent presents a frequency-based method for adapting memory coherence behavior, reflecting an effort to improve data sharing efficiency in multiprocessor systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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