This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Nvidia Corporation. Active years: 2026.
Company Filing History:
Years Active: 2026
Title: Innovations by Vaibhav Vyas in Memory Error Isolation
Introduction
Vaibhav Vyas is an accomplished inventor based in Santa Clara, CA. He has made significant contributions to the field of parallel computing, particularly in memory error isolation. His innovative work has led to the development of techniques that enhance the reliability and efficiency of computing systems.
Latest Patents
Vaibhav Vyas holds a patent for "Techniques for memory error isolation." This patent encompasses apparatuses, systems, and techniques designed to detect memory errors and isolate or migrate partitions on a parallel processing unit. The invention utilizes an application programming interface to facilitate parallel computing, such as CUDA. In one embodiment, interrupts are intercepted and processed on a graphics processing unit, indicating a memory error for one or more partitions. A policy is then applied to isolate that memory error from other partitions, ensuring system stability.
Career Highlights
Vaibhav Vyas is currently employed at Nvidia Corporation, a leading company in graphics processing technology. His work at Nvidia has allowed him to push the boundaries of what is possible in parallel computing. With a focus on memory error isolation, he has contributed to advancements that benefit a wide range of applications.
Collaborations
Some of Vaibhav's notable coworkers include Jonathon Stuart Ramsay Evans and Naveen Cherukuri. Their collaborative efforts have further enhanced the innovative environment at Nvidia Corporation.
Conclusion
Vaibhav Vyas is a prominent figure in the field of memory error isolation, with a patent that showcases his innovative approach to parallel computing. His contributions at Nvidia Corporation continue to shape the future of technology.