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For the Inventor, By the Inventor

Antibes, France

Ugo Castorina

This inventor holds 11 USPTO granted patents and 7 published patent applications. Top assignee: Arm Limited. Active years: 2023-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ugo Castorina. Retrieved from https://idiyas.com/inventor/ugo-castorina

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 11 

% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:

goldMedal11 out of 3,772 
 
Arm Limited
 patents

Years Active: 2023-2026

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11 patents (USPTO):Explore Patents
1. 12717721 - Operational modes for prefetch generation circuitry (2026-08-25),
2. 12717581 - Updating training data (2026-08-25),
3. 12645456 - Prefetching to retrieve content from a memory system (2026-06-02),
4. 12554646 - Prefetch training circuitry (2026-02-17),
5. 12530301 - Prefetch attribute value prediction (2026-01-20),
6. 12399833 - Prefetching using global offset direction tracking circuitry (2025-08-26),
7. 12277063 - Bypassing program counter match conditions (2025-04-14),
8. 12013785 - Prefetch offset selection (2024-06-18),
9. 11853220 - Prefetcher training (2023-12-26),
10. 11847056 - Technique for controlling use of a cache to store prefetcher metadata (2023-12-19),
11. 11675702 - Replacement policy information for training table used by prefetch circuitry (2023-06-13),

Title: Ugo Castorina: Innovator in Memory Access Technologies

Introduction

Ugo Castorina is a notable inventor based in Antibes, France. He has made significant contributions to the field of memory access technologies, holding a total of 11 patents. His work focuses on improving the efficiency of memory access through innovative prefetching techniques.

Latest Patents

One of Ugo's latest patents is titled "Prefetching using global offset direction tracking circuitry." This invention involves an apparatus that includes prefetcher circuitry designed to perform prefetching. The prefetching process involves maintaining offset scores for various candidate offsets, which are determined based on the detection of offset-matching instances. The prefetcher adapts its operations based on a global offset direction indicator, enhancing the efficiency of memory access requests.

Another significant patent is "Bypassing program counter match conditions." This apparatus aims to improve the tracking of memory access streams for training a stride prefetcher. It includes a training data structure that stores entries for training, specifying stride offsets and target addresses. The training control circuitry determines whether to update the stride offset based on specific conditions, thereby optimizing memory access tracking.

Career Highlights

Ugo Castorina is currently employed at Arm Limited, a leading company in semiconductor and software design. His work at Arm Limited has allowed him to develop and refine his innovative ideas in memory access technologies.

Collaborations

Ugo collaborates with several talented individuals, including Damien Matthieu, Valentin Cathrine, and Marco Coletta. These collaborations have contributed to the advancement of his research and the successful development of his patents.

Conclusion

Ugo Castorina is a prominent inventor whose work in memory access technologies has led to several innovative patents. His contributions continue to shape the future of efficient memory management in computing systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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