Tokyo, Japan

Toshimitsu Akane

This inventor holds 1 USPTO granted patent. Top assignee: Riken Corporation. Active years: 2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Toshimitsu Akane. Retrieved from https://idiyas.com/inventor/toshimitsu-akane

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2002

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1 patent (USPTO):Explore Patents

Title: Innovations by Toshimitsu Akane in Semiconductor Technology

Introduction

Toshimitsu Akane is a notable inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology. His innovative work focuses on improving the formation of cap layers for semiconductors, which is crucial for enhancing their performance and reliability.

Latest Patents

Toshimitsu Akane holds a patent for a "Process for formation of cap layer for semiconductor." This process aims to create a cap layer with a low degree of contamination. The cap layer can be easily formed on the surface of a semiconductor, ensuring a strong and stabilized binding force. The method involves introducing nitrogen atoms into the semiconductor surface and forming a nitride compound that serves as the cap layer.

Career Highlights

Toshimitsu Akane is associated with Riken Corporation, a leading research institution in Japan. His work at Riken has allowed him to explore advanced semiconductor technologies and contribute to the development of innovative solutions in the field.

Collaborations

Throughout his career, Toshimitsu has collaborated with esteemed colleagues such as Koji Sugioka and Katsumi Midorikawa. These collaborations have further enriched his research and development efforts in semiconductor technology.

Conclusion

Toshimitsu Akane's contributions to semiconductor technology through his innovative patent demonstrate his expertise and commitment to advancing the field. His work continues to influence the development of more efficient and reliable semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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