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For the Inventor, By the Inventor

Cupertino, CA, United States of America

Tosaku Nakanishi

USPTO Granted Patents = 11

Average Co-Inventor Count = 2.6

ph-index = 9

Forward Citations = 577(Granted Patents)


Location History:

  • Cupertino, CA (US) (1995 - 1999)
  • Hillsboro, OR (US) (2000)
  • Saratoga, CA (US) (2002 - 2004)

Company Filing History:

goldMedal10 out of 54,664 
 
Intel Corporation
 patents
silverMedal1 out of 832,680 
Other
 patents

Years Active: 1995-2004

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11 patents (USPTO):Explore Patents
1. 6735659 - Method and apparatus for serial communication with a co-processor (2004-05-11),
2. 6631474 - System to coordinate switching between first and second processors and to coordinate cache coherency between first and second processors during switching (2003-10-07),
3. 6470422 - Buffer memory management in a system having multiple execution entities (2002-10-22),
4. 6349363 - Multi-section cache with different attributes for each section (2002-02-19),
5. 6014751 - Method and apparatus for maintaining cache coherency in an integrated (2000-01-11),
6. 5918043 - Method and apparatus for asynchronously stopping the clock in a processor (1999-06-29),
7. 5657483 - Computer system with power management feature for stopping the internal (1997-08-12),
8. 5560002 - Method of testing a microprocessor by masking of an internal clock signal (1996-09-24),
9. 5560001 - Method of operating a processor at a reduced speed (1996-09-24),
10. 5473767 - Method and apparatus for asynchronously stopping the clock in a processor (1995-12-05),
11. 5469544 - Central processing unit address pipelining (1995-11-21),

Title: The Innovations of Tosaku Nakanishi

Introduction

Tosaku Nakanishi is a prominent inventor based in Cupertino, CA. He holds a total of 11 patents that showcase his contributions to the field of microprocessor technology. His work has significantly impacted the way processors communicate and operate in various computing environments.

Latest Patents

One of Nakanishi's latest patents is a method and apparatus for serial communication with a co-processor. This invention provides a microprocessor with a CPU core, a set of serial interface registers, and a serial interface unit, enabling efficient serial communication between the microprocessor and a co-processor. Another notable patent is a system designed to coordinate switching between first and second processors while maintaining cache coherency during the transition. This system allows for the selection of a primary processor based on the power source, optimizing performance and power consumption.

Career Highlights

Throughout his career, Nakanishi has worked with leading technology companies, including Intel Corporation. His experience in the industry has allowed him to develop innovative solutions that address complex challenges in microprocessor design and functionality.

Collaborations

Nakanishi has collaborated with notable professionals in the field, including James P Kardach and Jimmy S Cheng. These partnerships have contributed to the advancement of his inventions and the overall progress in microprocessor technology.

Conclusion

Tosaku Nakanishi's contributions to the field of microprocessors through his patents and collaborations highlight his role as an influential inventor. His work continues to shape the future of computing technology.

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