This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Ngk Insulators, Inc.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Tomoya Ina - Innovator in Wafer Placement Technology
Introduction
Tomoya Ina is a notable inventor based in Nagoya, Japan. He has made significant contributions to the field of semiconductor manufacturing, particularly with his innovative designs that enhance the efficiency of wafer placement.
Latest Patents
Tomoya Ina holds a patent for a wafer placement table. This invention features a ceramic plate with a designated wafer placement area on its upper surface. It includes a cooling plate attached to the lower surface of the ceramic plate, which contains a refrigerant flow path. Additionally, the design incorporates gas common paths located above the refrigerant flow path, gas introduction paths extending from the cooling plate's lower surface to the gas common paths, and multiple gas distribution paths. Notably, the gas distribution path at the outermost edge of the ceramic plate is strategically positioned to avoid overlapping with the refrigerant flow path in plan view. This innovative design aims to improve the performance and reliability of wafer placement in semiconductor processes.
Career Highlights
Tomoya Ina is currently employed at NGK Insulators, Inc., where he continues to develop cutting-edge technologies in the semiconductor industry. His work has been instrumental in advancing the capabilities of wafer handling and placement systems.
Collaborations
Tomoya has collaborated with talented colleagues such as Tatsuya Kuno and Masaki Ishikawa. Their combined expertise has contributed to the successful development of innovative solutions in their field.
Conclusion
Tomoya Ina's contributions to wafer placement technology exemplify his commitment to innovation in the semiconductor industry. His patent for the wafer placement table showcases his ability to address complex challenges in manufacturing processes.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
