Tohru Hiraoka

Title: Tohru Hiraoka: Innovator in Data Processing Technology

Introduction

Tohru Hiraoka is a notable inventor based in Hadano, Japan. He has made significant contributions to the field of data processing, holding a total of 2 patents. His work focuses on enhancing instruction decoding processes, which are crucial for efficient data handling in computing systems.

Latest Patents

Hiraoka's latest patents include a data processing device that features two instruction decoders for decoding branch instructions. This invention allows for the separation of instruction decoding into two stages. In the first stage, multiple instructions are decoded within a single machine cycle. When a branch instruction is decoded, a memory request is made to read the corresponding branch destination instruction. The decoded instructions are temporarily stored in instruction flow registers. The second stage involves decoding instructions that are read sequentially from these registers.

Another significant patent involves logical-to-real address translation, which utilizes selective control of selecting circuits. This innovation allows for the retrieval of a translation look-aside buffer, thereby defining a real address based on the known page address portion of a logical address. This method enhances the efficiency of address translation in computing systems.

Career Highlights

Throughout his career, Hiraoka has worked with prominent companies such as Hitachi, Ltd. and Hitachi Microcomputer System, Ltd. His experience in these organizations has contributed to his expertise in data processing technologies and instruction decoding.

Collaborations

Hiraoka has collaborated with notable coworkers, including Hiromichi Kainoh and Akira Yamaoka. Their collective efforts have further advanced the field of data processing and instruction decoding.

Conclusion

Tohru Hiraoka's contributions to data processing technology through his innovative patents demonstrate his significant impact on the field. His work continues to influence advancements in computing systems and instruction decoding processes.