Ting P Yen

Title: Innovations of Ting P Yen in Memory Technology

Introduction

Ting P Yen is a notable inventor based in Saratoga, California, recognized for his contributions to memory technology. With a total of three patents to his name, he has made significant advancements in the field of scalable flash EEPROM memory cells.

Latest Patents

Ting P Yen's latest patents include a method of making a scalable flash EEPROM memory cell with a notched floating gate and graded source region. This innovative memory device features source and drain regions that define a channel region between them. A select gate is formed over and insulated from a portion of the channel region. A conductive floating gate is positioned over and insulated from the source region and another portion of the channel region. The design includes a notch in the floating gate's bottom surface, which can either align with the edge of the source region or be positioned over it. Additionally, a conductive control gate is placed adjacent to the floating gate. This configuration enhances the breakdown voltage of the source junction by terminating the source region under the thicker insulation provided by the notch. Alternatively, the lower portion of the floating gate can be entirely over the source region, creating fringing fields to control the adjacent channel region.

Career Highlights

Ting P Yen has established himself as a key figure in the memory technology sector through his work at Integrated Memory Technologies, Inc. His innovative approaches have contributed to the development of advanced memory devices