Elk Grove, CA, United States of America

Timothy Wade Goodell


Average Co-Inventor Count = 4.5

ph-index = 4

Forward Citations = 185(Granted Patents)


Company Filing History:


Years Active: 1997-1999

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4 patents (USPTO):Explore Patents

Title: Innovations of Timothy Wade Goodell

Introduction

Timothy Wade Goodell is a notable inventor based in Elk Grove, CA (US). He has made significant contributions to the field of nonvolatile memory technology, holding a total of 4 patents. His work focuses on improving the efficiency and effectiveness of memory operations.

Latest Patents

Goodell's latest patents include innovative methods for queuing and absorbing erase commands in nonvolatile memory. One of his methods involves utilizing placeholder commands to prevent the depth of an operation queue from limiting the number of block erase commands that can be queued at one time. This method ensures that erase commands are efficiently managed, allowing for smoother operation of memory systems. Another patent focuses on prioritizing erase and program commands in a nonvolatile memory operation queue. This method allows for more erase commands to be queued for execution than what the depth of the operation queue otherwise permits, enhancing the overall performance of memory operations.

Career Highlights

Timothy Goodell is currently employed at Intel Corporation, where he continues to innovate in the field of memory technology. His work has been instrumental in advancing the capabilities of nonvolatile memory systems, making them more efficient and reliable.

Collaborations

Goodell has collaborated with notable colleagues such as Mickey L. Fandrich and Richard J. Durante. These collaborations have contributed to the development of cutting-edge technologies in the memory sector.

Conclusion

Timothy Wade Goodell's contributions to nonvolatile memory technology through his patents and work at Intel Corporation highlight his role as a key innovator in the field. His methods for managing erase commands significantly enhance memory operation efficiency.

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