Thomas V Radogna

Title: Thomas V Radogna: Innovator in Floating Point Computation

Introduction

Thomas V Radogna is a notable inventor based in Framingham, MA (US). He has made significant contributions to the field of floating point computation. His innovative techniques have paved the way for advancements in computational efficiency.

Latest Patents

Radogna holds a patent for a technique that provides a sign/magnitude subtraction operation. This system is designed for use in a floating point computation unit. It utilizes propagate/generate logic that responds to subtraction operands to produce intermediate and final propagate and generate outputs. The first carry computation logic is responsive to these outputs and a carry-in bit, producing final carry outputs and a carry-out bit. These outputs are essential for generating the first subtraction result. Additionally, second carry computation logic responds to intermediate propagate and generate outputs to produce second final carry outputs. The carry-out bit selects one of the two subtraction results as the final output.

Career Highlights

Radogna has worked at Data General Corporation, where he has applied his expertise in computational systems. His work has been instrumental in enhancing the performance of floating point operations.

Collaborations

Radogna has collaborated with Robert G Gelinas, contributing to the development of innovative computational techniques.

Conclusion

Thomas V Radogna's contributions to floating point computation demonstrate his innovative spirit and technical expertise. His patent reflects a significant advancement in computational technology.