San Jose, CA, United States of America

Thomas Tarter

This inventor holds 1 USPTO granted patent. Top assignee: Xmems Labs, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Thomas Tarter. Retrieved from https://idiyas.com/inventor/thomas-tarter-vtepfh3f

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Thomas Tarter and Semiconductor Heat Dissipation.

Introduction

Thomas Tarter is an inventor associated with San Jose, California. His patent work addresses thermal management for semiconductor devices.

Latest Patents

Tarter is credited with 1 patent: “Heat Dissipating Structure and Heat Dissipating Method Thereof.” The invention describes a duct with an internal channel and an airflow-generating device. Positioned on, by, or over a semiconductor device, the structure directs airflow through the channel to help dissipate heat generated by the device.

Career Highlights

Tarter is associated with Xmems Labs, Inc. His patent reflects work on airflow-based approaches to managing heat in semiconductor applications.

Collaborations

Tarter’s listed coworker is Jemm Yue Liang.

Conclusion

Thomas Tarter’s patent focuses on a duct-and-airflow design intended to dissipate heat from semiconductor devices, highlighting his contribution to thermal-management innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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