Saratoga, CA, United States of America

Thomas Stephen Chanak, Jr

This inventor holds 2 USPTO granted patents. Top assignee: Mips Technologies, Inc.. Active years: 2011-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Thomas Stephen Chanak, Jr. Retrieved from https://idiyas.com/inventor/thomas-stephen-chanak-jr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 50.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 2011-2012

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2 patents (USPTO):Explore Patents

Title: Thomas Stephen Chanak, Jr: Innovator in Digital Circuit Design

Introduction

Thomas Stephen Chanak, Jr. is a notable inventor based in Saratoga, CA (US). He has made significant contributions to the field of digital circuit design, holding a total of 2 patents. His work focuses on improving the efficiency and performance of digital circuits through innovative design tools.

Latest Patents

One of his latest patents is an automated digital circuit design tool that reduces or eliminates adverse timing constraints due to an inherent clock signal skew. This invention provides a solution by generating a clocking system that includes a clock signal generator, control logic, enable logic, and at least one clock gater. The clock signal generator distributes a clock signal to various logic blocks of the digital circuit using a buffered clock tree. The enable logic receives input values from the control logic and provides a control signal to the clock gater. When enabled, the clock gater allows a clock signal to pass through to multiple registers. An early clock signal is provided to registers in the control logic, which allows for an increased clock frequency while still meeting timing constraints.

Career Highlights

Thomas Chanak, Jr. is currently associated with Mips Technologies, Inc., where he continues to innovate in the field of digital circuit design. His work has been instrumental in advancing the capabilities of automated design tools.

Collaborations

He has collaborated with talented coworkers such as Avishek Panigrahi and Soumya Banerjee, contributing to the development of cutting-edge technologies in digital circuit design.

Conclusion

Thomas Stephen Chanak, Jr. is a prominent figure in the realm of digital circuit innovation, with a focus on enhancing design efficiency through his patented technologies. His contributions are paving the way for advancements in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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