Roseville, MN, United States of America

Thomas D Hartnett


Average Co-Inventor Count = 2.9

ph-index = 5

Forward Citations = 109(Granted Patents)


Location History:

  • Roseville, MN (US) (2000 - 2006)
  • Saint Paul, MN (US) (2008)

Company Filing History:


Years Active: 2000-2008

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6 patents (USPTO):Explore Patents

Title: Thomas D. Hartnett: Innovator in Pipeline Instruction Processing

Introduction

Thomas D. Hartnett is a notable inventor based in Roseville, MN (US), recognized for his contributions to the field of pipeline instruction processing. With a total of six patents to his name, Hartnett has made significant advancements in the design and control of instruction processing systems.

Latest Patents

Hartnett's latest patents include a "Central control system and method for using state information to model inflight pipelined instructions." This invention discloses a method and apparatus to control logic sections of a pipeline instruction processor. A state machine is provided that models the flow of instructions through the pipeline. The state machine is capable of modeling execution for all combinations of instruction types that may be present within the pipeline at a given time. Additionally, it models various events that affect the way instruction execution is overlapped within the pipeline, as well as other system occurrences that may cause the termination of some processing activity within the pipeline. The state machine provides signals to control the various logic sections, which may be used to determine whether the results of processing activity within the logic sections should be retained or discarded.

Another significant patent is the "Pipeline controller for providing independent execution between the preliminary and advanced stages of a synchronous pipeline." This design includes a first predetermined number of fetch logic sections, or 'stages', and a second predetermined number of execution stages. Instructions are retrieved from memory and undergo instruction pre-decode and decode operations during the fetch stages of the pipeline. Decoded instruction signals are then passed to the execution stages, where they control operand address generation, operand retrieval, arithmetic processing, and the storing of generated results. This design allows for independent advancement of instructions within the fetch and execution stages, ensuring efficient processing even when certain instructions stall.

Career Highlights

Hartnett has built a successful career at Unisys Corporation, where he has applied his innovative ideas to enhance instruction processing technologies. His work has contributed to the development of more efficient computing systems, showcasing his expertise in the field.

Collaborations

Throughout his career, Hartnett has collaborated with notable colleagues, including John Steven Kuslak and Douglas A. Fuller. These partnerships have fostered a creative environment that has led to the development of groundbreaking technologies.

Conclusion

Thomas D. Hartnett is a distinguished inventor whose work in pipeline instruction processing has significantly impacted

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