Terutoshi Yamasaki

Title: Terutoshi Yamasaki: Innovator in Semiconductor Circuit Design

Introduction

Terutoshi Yamasaki is a notable inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor circuit design, holding 2 patents that showcase his innovative approach to circuit layout verification.

Latest Patents

Yamasaki's latest patents include a "Method and apparatus for verification of a circuit layout" and a "Semiconductor circuit design verifying apparatus." The first patent focuses on efficiently verifying a semiconductor integrated circuit layout figure with high accuracy. This method involves a layout verifying process that checks whether a layout figure conforms to design rules based on vector data. It includes steps for classifying reference and object vectors and verifying distances between them. The second patent describes a semiconductor circuit design verifying apparatus that retrieves parasitic devices for signal lines connecting active devices. It computes time constants between these devices and outputs relevant information to users.

Career Highlights

Throughout his career, Yamasaki has worked with prominent companies such as Mitsubishi Electric Corporation and Mitsubishi Electric Semiconductor Software Co., Ltd. His experience in these organizations has allowed him to develop and refine his expertise in semiconductor technology.

Collaborations

Yamasaki has collaborated with notable colleagues, including Osamu Kitada and Hironobu Taoka. Their joint efforts have contributed to advancements in semiconductor design and verification processes.

Conclusion

Terutoshi Yamasaki's work in semiconductor circuit design and verification has made a lasting impact on the industry. His innovative patents reflect his commitment to enhancing the accuracy and efficiency of circuit layouts.