This inventor holds 1 USPTO granted patent. Top assignees: Hitachi Ulsi Systems Co., Ltd., Hitachi, Ltd.. Active years: 2005.
Company Filing History:
1 out of 336 
1 out of 42,717 
Years Active: 2005
Title: Teruo Kisu: Innovator in Semiconductor Technology
Introduction
Teruo Kisu is a notable inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.
Latest Patents
Kisu holds a patent for a "Method of manufacturing semiconductor device and semiconductor device." This invention involves a vertical MIS positioned above a trench-type capacitor in a memory cell forming region of a semiconductor substrate. Additionally, a lateral nMIS is integrated into the peripheral circuit forming region of the substrate. The process includes forming the capacitor first, followed by the lateral nMIS, and subsequently the vertical MIS. Furthermore, an isolation part of the peripheral circuit is established after the capacitor formation.
Career Highlights
Throughout his career, Teruo Kisu has worked with prominent companies such as Hitachi, Ltd. and Hitachi ULSI Systems Co., Ltd. His experience in these organizations has allowed him to develop and refine his expertise in semiconductor manufacturing.
Collaborations
Kisu has collaborated with notable colleagues, including Hiroshi Kujirai and Masahiro Moniwa. Their joint efforts have contributed to advancements in semiconductor technology.
Conclusion
Teruo Kisu's innovative work in semiconductor devices has made a lasting impact on the industry. His patent reflects his expertise and commitment to advancing technology in this critical field.