Teng Chiang Lin

Title: Innovations of Teng Chiang Lin

Introduction

Teng Chiang Lin is a notable inventor based in San Jose, California. He holds two patents that showcase his contributions to technology and innovation. His work primarily focuses on advancements in processor architecture and video decoding systems.

Latest Patents

One of Teng Chiang Lin's latest patents is titled "Debug interface for multiple CPU cores." This system includes processor cores that receive packets over a debug bus, allowing the cores to execute transactions in response to various types of packets. The architecture distinguishes between specified and non-specified resources, enhancing the efficiency of debugging processes.

Another significant patent is "Shared pipeline architecture for motion vector prediction and residual decoding." This architecture is designed for H.264 motion vector prediction and residual decoding, optimizing performance while using less memory compared to conventional architectures. It can be implemented in hardware as a system-on-chip or chip set, utilizing technologies such as field programmable gate arrays (FPGA) or application-specific integrated circuits (ASIC).

Career Highlights

Throughout his career, Teng Chiang Lin has worked with prominent companies, including Micronas USA, Inc. and Cavium, Inc. His experience in these organizations has contributed to his expertise in developing innovative solutions in the field of technology.

Collaborations

Teng has collaborated with several professionals in his field, including Weimin Zeng and Gerald Lampert. These collaborations have likely enriched his work and led to further advancements in his projects.

Conclusion

Teng Chiang Lin's contributions to technology through his patents reflect his innovative spirit and dedication to improving processor architecture and video decoding systems. His work continues to influence the industry and inspire future innovations.