Corvallis, OR, United States of America

Tejasvi Anand

This inventor holds 4 USPTO granted patents. Top assignees: International Business Machines Corporation, Oregon State University. Active years: 2018-2022.


% Patents Active = 50.0

Average Co-Inventor Count = 3.4

ph-index = 2

Forward Citations = 7(Granted Patents)


Location History:

  • Corvalis, OR (US) (2018)
  • Corvallis, OR (US) (2020 - 2022)

Company Filing History:


Years Active: 2018-2022

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4 patents (USPTO):Explore Patents

Title: Tejasvi Anand: Innovator in Low-Voltage Energy Solutions

Introduction

Tejasvi Anand is a prominent inventor based in Corvallis, OR (US). He has made significant contributions to the field of low-voltage energy harvesting, holding a total of 4 patents. His work focuses on developing integrated circuits that enhance energy efficiency and performance in various applications.

Latest Patents

One of his latest patents is an integrated circuit for low-voltage thermoelectric energy harvesting with self-start capabilities. This innovative IC lowers the start-up voltage to approximately 50 mV, making it compatible for initiating a DC-DC converter from a thermoelectric generator (TEG), even with minimal temperature gradients. The IC enhances the end-to-end efficiency of the energy harvester by improving the power efficiency of the DC-DC converter while ensuring maximum power transfer from the TEG at low voltages. It utilizes a low voltage integrated charge pump that can boost sub-100 mV input voltage. Additionally, a startup clock is generated by a ring-oscillator that operates with low supply, allowing for a single inductor to be used for both the DC-DC converter and its startup. This IC can be configured between the TEG and any downstream sensor or communication circuits to provide a sufficient voltage for powering these circuits from a low-voltage TEG energy source.

Another notable patent involves ultra-low voltage circuits. This invention includes an ultra-low voltage inverter that consists of a first inverter, a second inverter, and a third inverter. The first inverter receives input from a delay cell and generates an output for a subsequent delay cell. The second and third inverters are coupled to the first inverter, with their outputs connected to the source terminals of a p-type transistor and an n-type transistor of the first inverter, respectively. This ultra-low voltage inverter forms a delay cell, which serves as a fundamental building block of an ultra-low voltage ring-oscillator. A NAND gate is constructed using three inverters, where the outputs of two inverters are connected to the p-type transistors of the NAND gate, while the output of the third inverter is linked to an n-type transistor of the NAND gate.

Career Highlights

Tejasvi Anand has worked with notable organizations, including Oregon State University and IBM. His experience in these institutions has allowed him to develop and refine his innovative ideas in the field of energy

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