Company Filing History:
Years Active: 2008-2010
Title: Tarun Garg: Innovator in Assertion Synthesis and Verification
Introduction
Tarun Garg is a notable inventor based in Rohini, India. He has made significant contributions to the field of functional verification and assertion synthesis. With a total of 3 patents to his name, Tarun has demonstrated his expertise and innovative thinking in technology.
Latest Patents
Tarun's latest patents include a method and system for implementing context-aware synthesis of assertions. This invention focuses on converting an assertion formula to sequence implication form using semantic preserving rewrite rules. It also involves performing optimizations on the resulting formula to reduce the number of state-bits in a final Finite State Machine (FSM). Additionally, he has developed a method and system for handling assertion libraries in functional verification. This patent outlines structuring and implementing verification components in assertion libraries, creating assertion library elements for specific verification requirements, and visualizing assertion status at various levels of design hierarchy.
Career Highlights
Tarun currently works at Cadence Design Systems, Inc., where he applies his innovative ideas to enhance verification processes. His work has been instrumental in advancing the methodologies used in functional verification, making significant impacts in the industry.
Collaborations
Some of Tarun's coworkers include Vinaya Kumar Singh and Pratik Mahajan. Their collaboration has contributed to the successful development of various projects within the company.
Conclusion
Tarun Garg is a distinguished inventor whose work in assertion synthesis and verification has paved the way for advancements in technology. His patents reflect his commitment to innovation and excellence in the field.