Katano, Japan

Takeshi Onuma


Average Co-Inventor Count = 2.9

ph-index = 2

Forward Citations = 27(Granted Patents)


Company Filing History:


Years Active: 1980-1988

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2 patents (USPTO):Explore Patents

Title: The Innovations of Takeshi Onuma

Introduction

Takeshi Onuma is a notable inventor based in Katano, Japan. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approach to engineering.

Latest Patents

One of his latest patents is an annealing method for compound semiconductor substrates. This method involves using incoherent light, such as infrared light generated from tungsten or halogen lamps, to treat a GaAs wafer. The design includes a GaAs guard ring that surrounds the wafer, with specific dimensions to optimize performance.

Another important patent is for a junction-type field effect transistor (FET) and the method of making it. This invention features a semiconductor substrate of a first conductivity type and an island region of a second conductivity type, which includes a channel region. The design incorporates a buried isolating region formed by ion implantation, ensuring effective isolation of the channel region from the surface.

Career Highlights

Takeshi Onuma is currently employed at Matsushita Electric Industrial Co., Ltd., where he continues to develop innovative technologies in the semiconductor industry. His work has contributed to advancements in electronic devices and systems.

Collaborations

Throughout his career, Onuma has collaborated with notable colleagues, including Takashi Hirao and Shigetoshi Takayanagi. These partnerships have fostered a creative environment that encourages the development of groundbreaking technologies.

Conclusion

Takeshi Onuma's contributions to semiconductor technology through his patents and collaborations highlight his role as an influential inventor. His work continues to impact the field and inspire future innovations.

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