Suwon, South Korea

Taesoo Shin

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Taesoo Shin. Retrieved from https://idiyas.com/inventor/taesoo-shin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Taesoo Shin: Semiconductor Yield Prediction Innovation.

Introduction

Taesoo Shin is an inventor based in Suwon, South Korea. His patent work addresses semiconductor manufacturing and yield prediction.

Latest Patents

Shin is associated with 1 patent, titled “Semiconductor Yield Prediction Method and Apparatus.” The invention describes receiving wafer-level data from multiple wafers, generating corresponding virtual chips, and mapping wafer test results to those chips. It then calculates virtual-chip defect rates and uses them to determine an equipment defect index, supporting semiconductor yield analysis.

Career Highlights

Shin’s listed company is Samsung Electronics Ltd. His patent reflects work on applying wafer measurements and test results to assess defects and predict semiconductor yield.

Collaborations

His listed coworkers include Seulgi Ok and Kibum Lee.

Conclusion

Taesoo Shin’s patent focuses on using wafer-level data and virtual-chip analysis to evaluate equipment defects and support semiconductor yield prediction.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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