Sushmitha Ayyanar

Title: Sushmitha Ayyanar: Innovator in Processor-Based Devices

Introduction

Sushmitha Ayyanar is a prominent inventor based in San Jose, CA. She has made significant contributions to the field of processor-based devices, particularly in memory management systems. Her innovative work has led to the development of a unique patent that enhances the efficiency of virtual address processing.

Latest Patents

Sushmitha Ayyanar holds a patent titled "Exploiting virtual address (VA) spatial locality using translation lookaside buffer (TLB) entry compression in processor-based devices." This patent describes a processor-based device that includes a TLB with multiple entries, each containing a tag and several data portions. The memory management unit (MMU) within the device is designed to handle memory access requests effectively. When a TLB access results in a miss, the MMU generates a new TLB entry that optimizes the handling of virtual addresses and their corresponding physical addresses.

Career Highlights

Sushmitha Ayyanar is currently employed at Qualcomm Incorporated, a leading technology company known for its advancements in telecommunications and semiconductor technology. Her work at Qualcomm has positioned her as a key player in the development of innovative solutions for modern computing challenges.

Collaborations

Sushmitha has collaborated with notable colleagues, including Adrian Montero and Conrado Blasco. These partnerships have fostered a creative environment that encourages the exchange of ideas and the development of cutting-edge technologies.

Conclusion

Sushmitha Ayyanar's contributions to the field of processor-based devices exemplify her innovative spirit and dedication to advancing technology. Her patent on TLB entry compression showcases her ability to solve complex problems in memory management. As she continues her work at Qualcomm, her impact on the industry is sure to grow.