San Jose, CA, United States of America

Suoping Hu

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Suoping Hu. Retrieved from https://idiyas.com/inventor/suoping-hu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Suoping Hu: Inventor of a Multi-Core VCO Design

Introduction

Suoping Hu is an inventor based in San Jose, California, and works at Samsung Electronics Ltd. His patent work includes a design for a voltage-controlled oscillator (VCO) that uses a circular arrangement of multiple cores to help suppress unwanted operating modes.

Latest Patents

Hu is associated with 1 patent: “Multi-core VCO with robust unwanted mode suppression and circular coil topology.” The patent describes a system and method featuring two VCO cores, each with cross-coupled transistor pairs of different conductivity types. Synchronization traces connect corresponding transistor pairs between the cores. The cores are positioned opposite one another along a circular path on a substrate, a topology intended to support robust suppression of unwanted modes.

Career Highlights

Hu’s documented patent contribution focuses on oscillator architecture and circuit design. The disclosed arrangement combines synchronized VCO cores with a circular layout, addressing unwanted modes through both electrical connections and physical placement.

Collaborations

Hu’s listed coworkers include Wanghua Wu and Taeyoung Kang. Their names are associated with the professional context provided for Hu, though specific roles in the patent are not stated here.

Conclusion

Suoping Hu’s patent highlights a multi-core VCO design that coordinates transistor pairs across a circular substrate layout to suppress unwanted modes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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