This inventor holds 1 USPTO granted patent. Top assignees: Infineon Technologies Ag, Samsung Electronics Co., Ltd.. Active years: 2008.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:


Years Active: 2008
Title: Sun Oo Kim and Dual-Damascene Interconnect Innovation.
Introduction
Sun Oo Kim is an inventor associated with Hopewell Junction, New York. Her patent work addresses methods for forming dual-damascene interconnect structures in semiconductor devices, with a focus on using planarization layers that have different porosity characteristics. Kim’s listed patent portfolio includes 1 patent.
Latest Patents
Kim’s patent, “Methods of Forming Dual-Damascene Interconnect Structures on Semiconductor Substrates Using Multiple Planarization Layers Having Different Porosity Characteristics,” describes a process for creating interconnect structures within an integrated circuit.
The method forms an electrically insulating layer on a substrate and creates at least one via hole through part of that layer. The via is filled with a first insulating material, then covered with a second insulating material whose porosity is lower. After selectively etching back the second material, the process exposes part of the via fill and etches a trench in the insulating layer. The resulting structure supports dual-damascene interconnect formation.
Career Highlights
The supplied career information associates Kim with Samsung Electronics Co., Ltd. and Infineon Technologies AG. Her patent reflects work on semiconductor fabrication processes and the formation of integrated-circuit interconnects.
Collaborations
Kim’s listed coworkers include Seung-Man Choi and Kyoung-Woo Lee. The patent’s technical subject places their work in the broader field of semiconductor manufacturing and interconnect design.
Conclusion
Sun Oo Kim’s patent describes a layered, porosity-controlled approach to forming dual-damascene interconnect structures, contributing to methods for fabricating integrated circuits.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile