Seoul, South Korea

Sun Jin Lee

This inventor holds 1 USPTO granted patent. Top assignee: Seoul National University. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sun Jin Lee. Retrieved from https://idiyas.com/inventor/sun-jin-lee-tn179yca

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations of Sun Jin Lee in 3D DRAM Technology.

Introduction

Sun Jin Lee is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of semiconductor technology, particularly in the development of memory devices. His innovative work has led to the creation of a unique capacitorless 3D DRAM device.

Latest Patents

Sun Jin Lee holds a patent for a "Capacitorless 3D DRAM device and manufacturing method thereof." This invention includes a write bit line extending in a vertical direction, a write word line extending in a horizontal direction, and a write transistor connected to both lines. The device is designed to enhance memory efficiency and performance.

Career Highlights

Sun Jin Lee is affiliated with Seoul National University, where he continues to advance research in semiconductor technologies. His work has garnered attention for its potential to revolutionize data storage solutions.

Collaborations

He collaborates with notable colleagues such as Cheol Seong Hwang and Seo Young Jang, contributing to a dynamic research environment focused on innovative memory technologies.

Conclusion

Sun Jin Lee's contributions to the field of 3D DRAM technology exemplify the impact of innovative thinking in semiconductor research. His work continues to pave the way for advancements in memory devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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